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Controlled Impedance on the Speedway

focus symbol Marketing campaigns advertise instant feedback and faster connections, and technology trends for industry and commerce move toward smaller and lighter electronic devices with complicated feature sets.

To meet these performance demands, PCB designers are using higher frequencies in tighter space allowances. Increasing data rates and associated bandwidth requirements drive the computing speed to 100 MHz and beyond, threatening signal quality.

Controlled impedance is the key to maintaining signal integrity in a high-speed environment. By carefully adjusting dimensions and materials, PCB designers can control impedance and maximize transmission speed and quality.

Examples of devices with controlled impedance include:

  • high-speed digital applications,
  • analog and digital telecommunications,
  • high quality analog video signal processing,
  • real-time graphic processing,
  • RF communication, and
  • any technological device computing at or above 100 MHz.
Collision Course

Consider the scenario of an automobile speedway. Drivers traveling at moderate speeds have more time to anticipate and react to the actions of other drivers and road conditions. If another car swerves or the driver encounters a bump in the road, the slower speeds allow more control and the driver can stay on course. At extremely high speeds, even a slight nudge from another driver can lead to a collision serious enough to stop the race.

Similarly, increased operating speeds exaggerate signal disruptions in PCBs. A minute PCB trace variance can cause a fluctuation in impedance, or a discontinuity. Although generally unnoticed at lower frequencies, discontinuities become problematic at higher frequencies. Discontinuities cause signal noise and impedance mismatch at increasing speeds and switching rates; as a result, the signal degrades or fails.

PCB designers are further challenged by space constraints. As the traces are moved closer together, the effect of their electromagnetic fields grows stronger. When the traces are close enough for electromagnetic fields to interact, interruptions or collisions can occur.

The electrical reflections caused by the stronger electromagnetic fields interfere with other signals in close proximity, resulting in crosstalk and return loss.

Further speedway comparisons illustrate the errors that result from mismatched impedance. Drivers attempting to merge with other cars must match their speed to the other vehicles. If a car travels too fast, it may collide with another vehicle and bounce back into the other lane. The car will probably reach its destination, but it will not arrive intact.

Similarly, the impedance of the PCB traces must match the impedance of the receiver devices in order to relay the maximum signal. If the PCB driver's impedance does not match the receiver's, only a portion of the signal transfers from the sending device to the receiving device.

Because the receiving device collects only a partial signal, the transmission quality is degraded. The remaining portion of the signal power reflects back to the sending device, causing further problems.

In terms of PCB transmission quality, impedance mismatches cause the signal to reflect, disperse, and arrive in fragments and at uneven intervals. Impedance control can prevent this type of data loss and poor transmission quality.

Controlled Conditions

PCB designers control impedance by calculating and adjusting electrical dimensions, spacing, and materials.

Controlled impedance factors include:

  • dielectric space between layers,
  • trace width and thickness, and
  • etch quality and type.

Impedance refers to a basic physics principle: capacitance exists between any two conductors separated by a non-conducting layer. This capacitance is the product of the dielectric constant of the insulator multiplied by the surface area of the conductors and then divided by the distance between them. For a printed circuit board using an FR4 dielectric, the dielectric constant is a range between 4.2 and 4.8.

Many types of impedance traces are utilized in printed circuit boards. One of the most common is the embedded stripline. In a stripline construction, a thin trace is sandwiched between two planes.

A stripline conductor with an impedance of 50 ohms could be achieved with a 12 mil trace of 1 oz. copper that was 16 mils (0.016") from each of the two planes. The variation in dielectric constant for FR4 would give an impedance range of 48 to 52 ohms. This can easily be extrapolated from a formula for this type of impedance.

Mr. Tech Dweeb Tech Tip
Mr. Tech Dweeb

dsi uses the following formula for calculating stripline impedance:

stripline impedance calculation

The stripline formula can be read as 60 divided by the square root of the dielectric constant multiplied by the natural log of (twice the dielectric space plus the trace thickness) divided by (the trace width multiplied by 0.8 plus the trace thickness) all multiplied by 1.9. Impedance formulas vary depending on impedance type, but calculations are similar.
dsi customer engineers verify the designers’ calculations of all controlled impedance boards before fabrication. As a service to customers, an impedance calculator is available on the dsi web site. Unlike most impedance calculators, the dsi calculator allows for normal process variables as well as theoretical computation.

Impedance formulas are approximations. It is important to correlate the calculations with actual measurements to validate etching and lamination processes. In most cases, impedance is verified by testing coupons located along the panel's edge.

Newer technologies, however, provide impedance testing of the actual board. Flying probe robotic testers provide more accurate test data, sharp and specific resolution using up to 2 GHz rise time, and a high degree of confidence in the actual board to be populated.

Refer to the article, Test Strategies: In-circuit Tests and the Flying Probe for additional information on flying probe robotic test systems and other aspects of planning and evaluating test strategies.