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Testing is integrated throughout the PCB assembly process, applying test strategies such as: Bare Board Test (BBT), Automated Optical Inspection (AOI), Automated X-ray Inspection (AXI), In-circuit Test (ICT), Flying Probe Test (FPT), Functional Test, System Test, and Environmental Stress Screening (ESS). Most modern test strategies include the industry's fundamental workhorse-the ICT. In-circuit TestersBasic ICTs verify the electrical integrity of the components comprising assembled PCBs. The technique of making simple impedance and voltage measurements allows detection of elementary assembly defects. Applying small signals and digital levels as stimuli and measuring responses from the PCB increases the fault spectrum. A comprehensive ICT can identify: shorts and opens (impedance variations between electrical circuits or nodes); passive device values such as resistance, capacitance and inductance; and orientation and function of bipolar devices such as diodes and transistors. To enhance the accuracy of these sensitive measurements, a guarding technique is applied to offset shunted currents that can cause errors. Digital ICT practices stimulate inputs to logic devices and measure vector responses for operational performance verification. The vectors often conform to logic truth tables, proven library models, or algorithms. More sophisticated digital methods can be used with additional ICT tester hardware and software tools that exercise the PCB using boundary-scan protocols (IEEE-1149.1). ICT testers can also use vectorless tests that apply analog signals to an unpowered device to determine the characteristics of solder joints. Vectorless techniques work with complex ICs and do not require familiarity with the device's operation. This approach detects manufacturing defects, but not functional or performance faults. The success of IC testing depends on the tester's ability to interface with the PCB being tested. The PCB's electrical and mechanical design must be compatible with the testing resources. PCB designs are commonly reviewed to ensure that Design for Testability (DFT) rules have been applied. The method for achieving the interface between a PCB and ICT is a "bed-of-nails" test fixture. Hundreds of spring probes are precisely positioned to make electrical contact with targets on the PCB. A target can be a lead of a through-hole part, a test pad specifically designed for tester access, or a via inherent in the board design.
Target size is important. The larger the target, the easier it is to build the fixture, and the more repeatable the electrical connection will be. Although smaller targets can be used successfully, pads .035" in diameter and 0.50" apart from center to center are typically the minimum recommended. As PCB designers pack more functionality onto smaller layouts, the probe targets are among the first items to be sacrificed. Ball grid array (BGA) and flip chip technologies place pins in close proximity, increasing component density and decreasing size. As a result, bed-of-nails fixtures are strained to meet the test requirements, and alternative methods must be employed. The applications of IC techniques are still valid, but the access to the PCB's circuits is limited. A FPT system addresses many of these shortcomings. Flying Probe TestersNamed for the rapid fixtureless mobility of the probes, the FPT uses movable probes to access test points, vias, component pads, and fine-pitch parts. FPTs typically have four or more probes that move simultaneously across the top and bottom of the board. Some systems use stationary probes for bottom-side board access in lieu of bottom-side flying probes. A Cartesian robot uses X, Y, and Z coordinates to navigate the probes in a three-dimensional space to test points. Because the FPT contains a limited number of probes, actual test times can be significantly slower than conventional ICT due to the time required to reposition the probes for each measurement. Unlike bed-of-nails testers, FPTs do not require test fixtures, saving the cost and time required to develop fixtures for specific board tests. On average, an ICT program and fixture for a bed-of-nails test takes four to six weeks to develop. A FPT program, which is developed from existing CAD files, can be created and debugged in a few days. A FPT can use the same test points as an ICT but can also target other items such as component pads or traces. A FPT offers smaller allowable distances between test points than that possible with ICT.
FPT techniques offer capabilities similar to an ICT program, testing for shorts and opens, passive device values, small-scale digital devices, vectorless techniques, and boundary scan. Although the test techniques are similar, the limited probe number calls for different test strategies. For example, an ICT program checks for shorts between a single node and all other nodes on the board. A FPT program usually employs an algorithm to check any single node to adjacent nodes or to nodes within a specific radius of the node under test. Due to the time required to physically move the probes, it is not practical to employ an exhaustive ICT strategy. Most FPTs offer a vision system with a CCD camera to assist PCB board registration and assure probe/board alignment. Vision systems also can be used as optical inspection tools for verifying items such as polarity markings or the placement of parts that are electrically untestable. FPT systems allow PCB designers to implement design changes without worrying about the impact to a test fixture. Compared to ICT, FPT programs can be modified and debugged with less cost and fewer schedule delays. Forming a Test PlanA complete test plan should encompass all of the test strategies mentioned in the introduction to this article. ICT and FPT offer options that may be applied to a specific strategy only. Forming a test plan involves assessing trade-offs between: cost, schedule, required quality level, and production quantities, run rates, and design stability. When evaluating the relative merits of both of these technical approaches, here are some elements to consider: In-Circuit Testing
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