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The best way to speed up your time to market is to perform a bare board test. It's a fact that not all manufactured boards are good. dsi recommends bare board testing for all double-sided and multi-layer boards.

Always request printed circuit board testing during the product prototype phase. Most prototypes are expensive. Testing at this stage helps avoid the costly mistake of assembling a defective board. It can prevent you from assembling precious, costly or scarce components on a bad board. Testing also helps contain your costs by reducing the likelihood that you will need additional prototype runs.

Always test during the product production phase. Downtime on any production line is costly in terms of labor, rework or missed deliveries. If an untested bare board is assembled, any functional problems will require troubleshooting to determine whether the board or the assembly is at fault. Testing the bare board saves time since any functional problems can be isolated to the assembly.

What We Offer
Test Equipment (qty) Capabilities Order Type
Double-sided test fixtures (2) Simultaneous continuity testing of end points
Board sizes up to 8.0" x 12.7" or 9.5" x 11.0"
.10" grid
5 to 250 V
5 Ω to 100 MΩ
Production quantities
Flying probes (2) Two-point moving probe tester
Board sizes up to 16.5" x 22.5"
25 to 500 V
7 Ω to 300 MΩ
Position accuracy of ± .002"
Prototype quantities or oversized boards
Probot Series Six-D Probe (1) Four-point moving probe tester
Board sizes up to 27" x 24"
0.5 to 100 V
5 Ω to 500 MΩ
Position accuracy of ± 0.00175"
Prototype quantities or oversized boards
High-potential (Hi-pot) tester (1) AC / DC
Up to 5000 V
As required

General Test Information
For the purpose of electrical testing, faults may be defined as measurement results other than those programmed to be representative of a good board. Distinguishing test types from types of faults is sometimes confusing. The following table indicates the fault type identified by each type of test.
Test Type Fault Type
Continuity Open
Isolation Short and/or leakage
Hi-pot Voltage breakdown
Here are brief definitions of each fault type and its possible causes:
Short - A short is an erroneous, undesired or unexpected low-resistance connection between two or more networks or isolated points, typically exhibiting a fairly low resistance value. Possible causes include exposure problems, underetching, contaminated phototools, or poor alignment.
Open - An "open" represents an absence of expected circuit continuity (a missing connection). Possible causes are overetching, underplating, contaminated raw material, or registration errors.
Leakage - A leak or "leaking network" is a type of short exhibiting a high resistance value. Common causes are moisture, conductive residues or debris.

Test Guideline Information
IPC-ET-652 "Guidelines and Requirements for Electrical Testing of Unpopulated Printed Circuit Boards" contains the industry standards for establishing testing requirements. This document recommends specifying more information than "100% bare board test required" to indicate what values and parameters should be tested. Ideally the following parameters should be defined and agreed upon as necessary for the product and its target application.
Parameter  
Data-driven testing, source of data, format and integrity Netlist, Mentor Neutral (.mnfv*) or
IPC-D-356A (.ipc)
Maximum allowable threshold for
continuity verification
Class 1 (General Electric): 50 Ω1
Class 2 (Dedicated Service): 20 Ω
Class 3 (High Reliability): < 20 Ω
Minimum allowable threshold and
applied voltage for isolation verification2
Class 1 (General Electric): 500 Ω
Class 2 (Dedicated Service): > 2 MΩ
Class 3 (High Reliability): > 2 MΩ
Test method Single-sided fixture, double-sided fixture
Flying probe
Hi-pot3
Board marking Preferred location (if applicable)
1 Reference IPC-ET-652
2 Voltage high enough to provide sufficient current for the measurement in question, but low enough to prevent arc-over.
3 Hi-pot testing can be specified as a voltage check or a leakage current check according to specified limits.